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CDiS (Clock Distribution module)

주요 스펙

Input Frequency
  • :1 to 15 GHz
Input Voltage
  • :300 mVpp to 600 mVpp
Jitter RMS
  • :1 ps
Jitter p-p
  • :2 ps
Output Voltage
  • :350 mVpp to 600 mVpp
- Distributes a clock input to 6 outputs
- All inputs and outputs are single ended
- 1.0 to 15.0 GHz
- Requires 2 slot in the PARALLEX System
- Distributes a clock input to 6 outputs
- All inputs and outputs are single ended
- 1.0 to 15.0 GHz
- Requires 2 slot in the PARALLEX System
LIST